A. Field of the Invention
The present invention relates to a manufacturing method of a silicon carbide (hereinafter abbreviated as SiC) semiconductor device for high breakdown voltage and large current uses. More specifically, the invention relates to a manufacturing method including a dry etching method for forming a mesa groove having a junction end portion surface which surrounds an active portion where a main current flows in a power semiconductor device such as a diode or a MOSFET which uses a SiC semiconductor substrate.
B. Description of the Related Art
Power MOSFETs, IGBTs, etc. are known and widely used as silicon (hereinafter referred to as Si) power semiconductor devices which are used in inverters and for AC power control and other purposes. However, in recent years, Si as a semiconductor material has come to be used frequently in ranges that are close to its material property limits in terms of power device semiconductor characteristics. As a result, SiC, which is a semiconductor material whose material property limits are higher than those of Si has attracted a great deal of attention. SiC materials (in particular, the one having a 4H—SiC crystal form) have features that the dielectric breakdown electric field is one-order higher, the band gap is 2.9 times larger, the thermal conductivity is 3.2 times higher, and the temperature of transition to an intrinsic semiconductor is 3 to 4 times higher than those of Si. Therefore, the material properties of SiC, the limits of which are higher than those of Si, are exercised greatly, particularly when SiC is used as a substrate material for a power device. As a result, it is expected that power devices having an SiC substrate can satisfy both high breakdown voltage and low on-resistance, which is difficult for Si devices because of a tradeoff relationship between these two parameters. As such, in recent years, many approaches to implementing such SiC devices as products have come to be made.
Techniques relating to manufacturing methods, including etching for putting into practical use or implementing as products power devices using wide-band-gap semiconductor materials such as SiC, are disclosed in JP-A-2005-322811 (corresponding to US 2005/0250336 A1), JP-A-2005-56868 (corresponding to which WO 02/099870 A1), and JP-A-2006-228901. JP-A-2005-322811 relates to a dry etching mask and discloses a manufacturing method which can increase the adhesion of an etching mask to a GaN semiconductor substrate and enables high-accuracy groove formation. JP-A-2005-56868 discloses a method to prevent occurrence of micro-trenches (which tend to cause reduction in breakdown voltage) in dry-etching a SiC substrate in which dry etching using an Al mask and full-surface dry etching (which is performed after removing the Al mask) are combined. JP-A-2006-228901 has a statement to the effect that to prevent reduction in breakdown voltage at top corners of trenches formed in a SiC substrate by etching, trench top corners are rounded by performing isotropic etching after increasing the thickness of oxide films formed on the trench bottoms.
However, actual manufacturing processes for putting into practice or implementing as products SiC power devices still have many and various problems to be solved. One specific problem resides in a process of forming, for example, a trench for a trench gate or a mesa groove having a junction end portion surface which surrounds a device active portion by dry etching in manufacturing a device using a SiC substrate. That is, in dry etching a SiC substrate, if kinds of gases used for the etching and various etching conditions (ICP (induction-coupled plasma) power, bias power, gas pressure, and gas flow rates) are not controlled properly, an etching failure occurs because an etching mask material is stuck to an etching subject material (formation of micro-masks) during dry etching of mesa grooves or micro-trenches are formed (i.e., small grooves are formed by excessive etching at bottom corners of recesses formed by the etching). This is problematic for the following reason. If such micro-masks or micro-trenches are formed, acute-angled portions tend to be formed in the etching surfaces of a mesa groove. If such acute-angled portions are formed in the surfaces of a mesa groove, an electric field is concentrated which makes any resulting device prone to dielectric breakdown. That is, the breakdown voltage of the device cannot be increased.
Usually, in manufacture of a high-breakdown-voltage device using a SiC substrate or some other substrate such as a Si substrate, the etching surface is required to be as free of acute-angled portions as possible when a mesa groove is formed by etching. To this end, a method is employed in which the mesa groove formation in a SiC substrate by dry etching is done in two stages having different sets of etching conditions to suppress generation of micro-trenches as mentioned above. For example, etching is performed at a relatively high etching rate at the first stage and then the etching rate is lowered to obtain a smooth final etched shape. However, this two-stage etching method has problems because the process is complex and there still remains some doubt about its reproducibility.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.